We are looking for a highly motivated and experienced RTL Design Engineer to join our Physical Design team. In this role, you will be responsible for designing, developing, and verifying high-performance, low-power RTL code, while closely collaborating with the Physical Design team to ensure seamless integration into the physical implementation. You will bridge the gap between front-end logic design and back-end physical implementation, optimizing for timing, power, and area constraints.

This role is hybrid, based out of Santa Clara, Austin or Ft Collins.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Develop RTL code using Verilog/SystemVerilog to implement chip functionality in SoCs and subsystems.
• Collaborate with SoC teams to support design efforts and ensure alignment across teams.
• Define and own timing constraints, working closely with the Physical Design team to ensure they meet performance goals.
• Perform LINT checks to ensure design quality and maintain cleanliness of the design.
• Create detailed documentation including block diagrams, interface definitions, and design assumptions.
• Conduct basic synthesis runs to validate RTL quality and readiness for physical implementation.

Experience & Qualifications:

• BS/MS/PhD in Electrical Engineering (EE), Electronics & Communication Engineering (ECE), Computer Engineering (CE), or Computer Science (CS).
• At least 5 years of industry experience in RTL design and verification.
• Proven expertise in logic design, with a strong ability to evaluate functionality, performance, timing, and power consumption.
• Extensive experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator).
• Hands-on experience with synthesis flows and power tools using industry-standard tools.
• Expertise in microarchitecture definition and specification development.
• Strong problem-solving and debugging skills across various levels of the design hierarchy.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.