Senior Technical Manager, Design Verification - RISC CPU

Tenstorrent

Tenstorrent

IT, Design
Bengaluru, Karnataka, India
Posted on Tuesday, April 30, 2024

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

The Senior Technical Manager, Design Verification - RISC CPU will play a pivotal role in overseeing the pre-silicon RTL verification of high-performance CPU microarchitectures for cutting-edge AI/ML applications. This position demands a deep understanding of computer architecture coupled with a robust foundation in verification methodologies to ensure comprehensive testing coverage and high confidence in the designs.

This role is onsite, based out of Bangalore.


Responsibilities:

  • Lead a team of skilled engineers in the development and execution of DV test plans for ISA and microarchitecture verification.
  • Collaborate closely with cross-functional leaders from RTL, Physical Design, and CPU Performance teams to ensure seamless integration and alignment of verification efforts.
  • Utilize SystemVerilog, UVM, C++, and scripting languages alongside industry-leading simulation tools and methodologies for the verification of complex CPU designs.
  • Drive negotiations on program objectives with Architecture, Design, and Software teams, guiding your team through planning, execution, and project closure.
  • Foster the professional development of team members, defining individual goals while aligning their efforts with the overarching team vision for optimal outcomes.


Experience & Qualifications:

  • Bachelor’s, Master’s, or PhD in Computer Engineering, Electronic Engineering, or a related field.
  • Extensive expertise in Computer Architecture, Microprocessor DV methodology, DV processes, testbench design, and quality requirements.
  • Prior experience in DV leadership roles, overseeing complex IP at Unit, Sub-system, or Top-level, coupled with proven experience managing engineering teams.
  • Demonstrated ability to influence organizational objectives and effectively align teams towards common goals.
  • Proficiency in hardware description languages such as Verilog and VHDL, along with a strong grasp of associated methodologies.
  • Exceptional planning and communication skills, with a proven ability to collaborate effectively across geographical locations and disciplinary boundaries.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.

As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and supporting documentation will be required and considered as a condition of employment.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.